• DocumentCode
    3555655
  • Title

    DYTEST: a self-learning algorithm using dynamic testability measures to accelerate test generation

  • Author

    Mao, Weiwei ; Ciletti, Michael D.

  • Author_Institution
    Dept. of Electr. Eng., Colarado Univ., Colorado Springs, CO, USA
  • fYear
    1988
  • fDate
    12-15 June 1988
  • Firstpage
    591
  • Lastpage
    596
  • Abstract
    The authors present a self-learning algorithm using a dynamic testability measure to accelerate test generation. They introduce the concepts of full-logic-value label-backward implication, dependent backtrack, and K-limited backtracks. Results indicating a high fault coverage are presented for ten benchmark combinational circuits.<>
  • Keywords
    combinatorial circuits; logic testing; DYTEST; K-limited backtracks; benchmark combinational circuits; dependent backtrack; dynamic testability measures; full-logic-value label-backward implication; high fault coverage; self-learning algorithm; test generation acceleration; Automatic testing; Circuit faults; Circuit testing; Combinational circuits; Electric variables measurement; Heuristic algorithms; Life estimation; Logic; Observability; Springs;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1988. Proceedings., 25th ACM/IEEE
  • Conference_Location
    Anaheim, CA, USA
  • ISSN
    0738-100X
  • Print_ISBN
    0-8186-0864-1
  • Type

    conf

  • DOI
    10.1109/DAC.1988.14822
  • Filename
    14822
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3555655