DocumentCode :
3555747
Title :
Ultra-thin gate-oxide characteristics and MOS/VLSI scaling implications
Author :
Han, Yu-Pin ; Mize, J. ; Mozdzen, T. ; O´Keefe, T. ; Pinto, J. ; Worley, R.
Author_Institution :
UTC/Mostek, Carrollton, Texas
Volume :
28
fYear :
1982
fDate :
1982
Firstpage :
98
Lastpage :
102
Abstract :
The properties of oxides (SiO2) in the 40- 300 Å region for MOS capacitors, MOSFET devices, and MOS/VLSI are experimentally determined in this investigation. Uniformity of oxide thickness, hard-wired short defects (pinholes), and latent defect densities are measured. The experimental data demonstrate that both MOS capacitors and transistors function classically with respect to Si/SiO2interface properties, threshold voltage, gm, etc. with oxide thickness well-below 100 Å. The MOSFET thin-oxide results are correlated with onset of short-channel effects. VLSI results are obtained with respect to 64K DRAM alpha immunity for storage-capacitor oxides of thickness 80- 455 Å. Extrapolations of device parameters indicate the necessity of reducing gate-oxide thickness to achieve super-scaled MOS/VLSI. When coupled to the experimental data base, these extrapolations indicate that utilization of oxide structures of thickness less than 100 Å may be of a more immediate nature than one might initially anticipate.
Keywords :
Acceleration; Density measurement; Dielectrics; MOS capacitors; Probes; Random access memory; Silicon; Stress; Very large scale integration; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1982 International
Type :
conf
DOI :
10.1109/IEDM.1982.190223
Filename :
1482757
Link To Document :
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