DocumentCode
3555767
Title
A high-yield GaAs MSI digital IC process
Author
Rode, Ajit ; McCamant, Angus ; McCormack, G. ; Vetanen, Bill
Author_Institution
Tektronix Inc., Beaverton, OR
Volume
28
fYear
1982
fDate
1982
Firstpage
162
Lastpage
165
Abstract
A planar GaAs digital IC process capable of fabricating MSI level circuits with a high yield has beer. demonstrated. The process has been characterized through extensive evaluation of test structures. Uniformity of process and device parameters is shown by statistical analysis of autoprobe test data on the test key. An empirical model is proposed that correlates process yield to active gate area for typical digital ICs fabricated with the process. Demonstration of such high yields indicates maturity of GaAs process technology.
Keywords
Contact resistance; Digital integrated circuits; FETs; Gallium arsenide; Implants; Probes; Radio frequency; Statistical analysis; Surface resistance; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1982 International
Type
conf
DOI
10.1109/IEDM.1982.190241
Filename
1482775
Link To Document