• DocumentCode
    3555925
  • Title

    An oxide masked p+ source/drain implant for VLSI CMOS

  • Author

    Hui, Alex C. ; Chiang, Shang-yi ; Cham, Kit M.

  • Author_Institution
    LSI Logic Corporation, Milpitas, CA
  • Volume
    28
  • fYear
    1982
  • fDate
    1982
  • Firstpage
    698
  • Lastpage
    701
  • Abstract
    A process innovation is proposed to help eliminate the p+ implant mask in VLSI CMOS process. After the resist masked n+ source/drain implant, a wet oxidation is done. Thick oxides are grown on the n+ single crystal and polysilicon, while a thin oxide is grown on the p-substrate. The thick oxides are used to mask the n+ regions from the blanket boron implant during the subsequent p+ source/drain formation. Small geometry CMOS devices are fabricated with this technique and give performance similar to those made with the conventional two mask source/drain processing.
  • Keywords
    Boron; CMOS process; Fabrication; Implants; Oxidation; Resists; Silicon; Strips; Threshold voltage; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1982 International
  • Type

    conf

  • DOI
    10.1109/IEDM.1982.190390
  • Filename
    1482924