DocumentCode
3555930
Title
A half micron MOSFET using double implanted LDD
Author
Ogura, Seiki ; Codella, Christopher F. ; Rovedo, Nivo ; Shepard, Joseph F. ; Riseman, Jacob
Author_Institution
IBM, Hopewell Junction, NY
Volume
28
fYear
1982
fDate
1982
Firstpage
718
Lastpage
721
Abstract
Double-implanted LDD, which consists of self-aligned p pockets below the n regions in LDD, is introduced to improve both breakdown and short channel effects. Its fabrication and experimental results are presented. The device optimized for a 0.5µm channel and 3.5V supply is discussed.
Keywords
Boron; DRAM chips; Design optimization; Electric breakdown; Fabrication; Implants; Jacobian matrices; MOSFET circuits; Power supplies; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1982 International
Type
conf
DOI
10.1109/IEDM.1982.190395
Filename
1482929
Link To Document