Title :
Automatic building of graphs for rectangular dualisation [IC floorplanning]
Author :
Jabri, Marwan A.
Author_Institution :
Sch. of Electr. Eng., Sydney Univ., NSW, Australia
Abstract :
Rectangular dualisation is used to generate rectangular topologies in top-down floorplanning of integrated circuits. The author presents an efficient algorithm that transforms an arbitrary graph, representing a custom integrated circuit into one suitable for rectangular dualisation. The algorithm uses efficient techniques in graph processing, such as planar embedding, and introduces a novel procedure to transform a tree of biconnected subgraphs into a block neighborhood graph that is a path
Keywords :
circuit layout CAD; graph theory; integrated circuit technology; network topology; CAD; biconnected subgraphs; block neighborhood graph; custom IC; integrated circuits; layout design; planar embedding; rectangular dualisation; rectangular topologies; top-down floorplanning; tree transformation; Application specific integrated circuits; Australia; Automation; Circuit topology; Design methodology; Integrated circuit interconnections; Laboratories; Process design; Shape; Tree graphs;
Conference_Titel :
Design Automation Conference, 1988. Proceedings., 25th ACM/IEEE
Conference_Location :
Anaheim, CA
Print_ISBN :
0-8186-0864-1
DOI :
10.1109/DAC.1988.14832
