DocumentCode :
3556050
Title :
Fully decoded GaAs 1 KB static RAM using closely spaced electrode FETs
Author :
Katano, F. ; Takahashi, K. ; Uetake, K. ; Ueda, K. ; Yamamoto, R. ; Higashisaka, A.
Author_Institution :
NEC Corporation, Kawasaki, Japan
Volume :
29
fYear :
1983
fDate :
1983
Firstpage :
336
Lastpage :
339
Abstract :
A low power, high speed GaAs 1 Kb static RAM has been designed and fabricated, exhibiting 30 mW power dissipation and 6 ns address access time. The 180 pJ access time-dissipation power product obtained in this work is the smallest in the GaAs 1 Kb static RAMs that have ever been reported. The fabricated device is constructed by E/D type direct coupled FET logic (DCFL) gates and can operate with a single power supply below 1 V, both for the memory cells and for the peripheral circuits. Our GaAs LSI processing technologies, including the closely spaced electrode FET fabrication technology, made it possible to achieve a complete (full bit) memory operation.
Keywords :
Coupling circuits; Decoding; Electrodes; FETs; Gallium arsenide; Logic devices; Logic gates; Power dissipation; Read-write memory; Space technology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1983 International
Type :
conf
DOI :
10.1109/IEDM.1983.190510
Filename :
1483635
Link To Document :
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