DocumentCode :
3556064
Title :
Optimized and reliable LDD structure for 1 µm NMOSFET based on substrate current analysis
Author :
Matsumoto, Y. ; Higuchi, T. ; Sawada, Syo ; Shinozaki, S. ; Ozawa, O.
Author_Institution :
Toshiba Corporation, Kawasaki, Japan
fYear :
1983
fDate :
5-7 Dec. 1983
Firstpage :
392
Lastpage :
395
Abstract :
Optimization of the n- region concentration for n-channel MOSFETs with a Lightly Doped Drain (LDD) structure was investigated based on the analysis of substrate current characteristics. When a substrate current "tail" is observed which is peculiar to the LDDFET with low concentration n-region, a gate current is not observed, which means strong resistance against hot carrier injection. This was cofirmed by a bias stress test. Optimized surface concentration of the n-region ranges from 
cm-3to 
cm-3under the condition of negligible VTH shift and gm degradation of less than 25% compared to those of conventional Tr\´s.
cm-3to cm-3under the condition of negligible VKeywords :
Etching; Fabrication; Hot carrier injection; Laboratories; MOSFET circuits; Reliability engineering; Semiconductor devices; Substrate hot electron injection; Tail; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1983 International
Conference_Location :
Washington, DC, USA
Type :
conf
DOI :
10.1109/IEDM.1983.190524
Filename :
1483649
Link To Document :
