DocumentCode
3556115
Title
Routing algorithm for gate array macro cells
Author
Chakraverti, Atreyi ; Chung, Moon Jung
Author_Institution
Renssalaer Polytech. Inst., Troy, NY, USA
fYear
1988
fDate
12-15 Jun 1988
Firstpage
658
Lastpage
662
Abstract
The authors present an efficient dynamic algorithm for routing replaced gate array macrocells. A novel data structure based on corner stitching is introduced to represent the routing environment in a general gate array, where a uniform grid cannot be superimposed on the basic-cell. The near-optimal routing is accomplished in iterations with an initial shortest-path routing followed by conflict resolution using a coloring procedure and net reordering
Keywords
cellular arrays; circuit layout CAD; data structures; integrated logic circuits; logic CAD; CAD; coloring procedure; conflict resolution; corner stitching; data structure; dynamic algorithm; gate array macro cells; iterations; layout design; logic design; near-optimal routing; net reordering; routeing; shortest-path routing; Books; Circuits; Data structures; Heuristic algorithms; Metals industry; Resistors; Routing; Terminology; Tiles; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1988. Proceedings., 25th ACM/IEEE
Conference_Location
Anaheim, CA
ISSN
0738-100X
Print_ISBN
0-8186-0864-1
Type
conf
DOI
10.1109/DAC.1988.14837
Filename
14837
Link To Document