Computer-aids for analysis and scaling of extrinsic devices

Although intrinsic effects have been successfully modeled using computer analysis, the capability to characterize and predict extrinsic effects has lagged behind. Scaling of VLSI now requires coordinated analysis of all resistive, capacitive, and parasitic devices-especially those associated with isolation and CMOS well structures. This paper addresses the problem of intrinsic devices imbedded in a complete technology framework including parasitics. Results are presented for resistive and capacitive effects which influence intrinsic device performance. The role of velocity saturation on Cgdis explained. Analysis of isolation structures shows the importance of nonplanar analysis and effects of two-dimensional impurity distributions. An hierarchy of approaches for latch-up analysis is considered. Use, of circuit- like one-dimensional analysis can give good results for some holding conditions. However, transient two-dimensional (2D) results are needed to account for more complex triggering conditions. Results of 2D simulation show critical process-dependent effects of triggering. The PISCES program is demonstrated to be a powerful tool for analysis of both intrinsic and parasitic 2D device effects.