Conduction in thermal oxides grown on polysilicon and its influence on floating gate EEPROM degradation

A new model is presented which describes the electrical conduction in thermal oxides grown on polysilicon. The model is based on a well-considered non-uniform distribution of field enhancement factors at the polysilicon-polyoxide interface, combined with the conventional Fowler-Nordheim current injection and a first order kinetic trapping model. It is found that the current-voltage behaviour measured in oxides during consecutive voltage ramps can only be explained quantitatively by this model. From this analysis it is shown that polyoxides have nearly the same trapping properties as oxides grown on single crystalline silicon. Furthermore, the model was used to investigate the degradation of floating gate EEPROM cells, relying on polyoxide conduction. It is shown that, in spite of the good trapping properties of the oxide layer itself, the number of write/erase cycles is mainly limited by the non-uniformity of the field enhancement.