Title :
Advances in oxidized porous silicon for SOI
Author_Institution :
IBM General Technology Division, Essex Junction, Vermont
Abstract :
The formation of a silicon-on-insulator (SOI) structure for VLSI applications by means of oxidized porous silicon (OPS) is attractive for both materials and device reasons. Despite these advantages, SOI by OPS may be liable to various processing contraints. These constraints include (a) limited silicon island size and geometry, (b) wafer warpage due to oxidation of the porous silicon, and (c) defects in the silicon islands that form during oxidation of the porous silicon. The purpose of this paper is to present a process which minimizes the first two problems and results in no TEM observable defects in the silicon islands. Also, some preliminary device results will be given from FETs fabricated in an SOI structure formed by OPS.
Keywords :
Etching; FETs; Geometry; Insulation; Isolation technology; Nitrogen; Oxidation; Silicon on insulator technology; Simulated annealing; Very large scale integration;
Conference_Titel :
Electron Devices Meeting, 1984 International
DOI :
10.1109/IEDM.1984.190848