Title :
Prospects of SST technology for high speed LSI
Author :
Sakai, Tetsushi ; Konaka, Shinsuke ; Yamamoto, Yousuke ; Suzuki, Masao
Author_Institution :
NTT Kanagawa, Japan
Abstract :
SST has realized very high speed integrated circuits with a basic gate delay time of 25.8 ps/gate. Also, a 10.38 GHz frequency divider, a 0.85 ns 1 Kb RAM and a 6 ns 16×16 bit parallel multiplier are fabricated using SST with 1um optical lithography. For a scaled-down SST transistor, the basic gate delay time is expected to be less than 10 ps/gate.
Keywords :
Delay effects; Etching; Frequency conversion; High speed optical techniques; Integrated circuit technology; Large scale integration; Lithography; Optical frequency conversion; Stimulated emission; Very high speed integrated circuits;
Conference_Titel :
Electron Devices Meeting, 1985 International
DOI :
10.1109/IEDM.1985.190880
