DocumentCode
3556438
Title
A new "SICOS" Schottky device
Author
Okada, Yutaka ; Nakamura, Tohru ; Okabe, Takahiro ; Nagata, Minoru
Author_Institution
Hitachi, Ltd., Kokubunji, Tokyo, Japan
Volume
31
fYear
1985
fDate
1985
Firstpage
38
Lastpage
41
Abstract
A new Schottky barrier diode (SBD) structure with a very small self-aligned guard ring has been proposed. This device is compatible with the SICOS (SIdewall base COntact Structure) process [1] [2]. The key technology is lateral impurity diffusion from doped poly-silicon, which makes guard ring size very small and improves the clamping effectiveness of SBDs. Very high speed Schottky TTL circuits using proposed devices are demonstrated which achieve a gate delay time of 330 ps/gate (fan in=3) with 2.3 mW/gate power dissipation, making them very attractive for use in high performance bipolar VLSIs.
Keywords
Circuits; Clamps; Delay effects; Epitaxial layers; Fabrication; Impurities; Ion implantation; Laboratories; Schottky barriers; Schottky diodes;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1985 International
Type
conf
DOI
10.1109/IEDM.1985.190885
Filename
1485435
Link To Document