Lightly doped drain structure for advanced CMOS (Twin-Tub IV)

A lightly doped drain (LDD) structure(1) is used in our Twin-Tub IV, fourth generation Twin-Tub CMOS technology to improve stability of the N-channel transistor. The LDD N-channel transistors were successfully incorporated into the technology without adding any additional photolithography steps to the conventional process. The key to the process is a differential oxidation step of BF2implanted source/drain regions, which prevents unwanted DMOS P-channel transistor caused by N^-doping under the oxide spacer(2) typically used in LDD device.