DocumentCode :
3556565
Title :
Analysis of LDD transistor asymmetry susceptibility in VLSI circuits
Author :
Oowaki, Y. ; Itoh, Y. ; Momodomi, M. ; Horiguchi, F. ; Watanabe, S. ; Ogura, M. ; Nishimura, H.
Author_Institution :
TOSHIBA Corporation, Kawasaki, Japan
Volume :
31
fYear :
1985
fDate :
1985
Firstpage :
492
Lastpage :
495
Abstract :
This paper describes problems due to asymmetry of source and drain impurity profile caused by the shadowing of ion beams by gate electrodes. This asymmetry degrades the sensitivity of sense amplifiers especially when Lightly-Doped-Drain/Source (LDD) transistors are adopted. This effect is a serious obstacle to realize ultra high density DRAM´s. In order to reduce this effect, a sensing circuit suppressing the asymmetry effect is proposed and its sensitivity improvement is evaluated.
Keywords :
Analytical models; Degradation; Driver circuits; Electrodes; Implants; Impurities; Random access memory; Transconductance; Very large scale integration; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1985 International
Type :
conf
DOI :
10.1109/IEDM.1985.191011
Filename :
1485561
Link To Document :
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