A high performance memory cell technology for mega bit EPROMS

A high performance memory cell technology for mega bit EPROMs has been developed using 1.3 µm process. Deeply Doped Channel ( DDC ) and Double Step Drain ( DSD ) structures incorporated into the scaled memory cell improve programming speeds by more than one order of magnitude with maintaining high breakdown voltages, small parasitic effects,and soft-write immunity. This technology has been successfully applied to one mega bit CMOS EPROMs with a cell size of 19.27 µm²and realized programming time less than 10 µs for a programming voltage of 12.5 V.