A high performance CMOS technology for 256K/1MB EPROMs

A technology has been developed which integrates new pro cesses necessary to implement high performance and reliable CMOS EPROMS. This technology consists of a single 250 A first poly transistor with double diffused source and drains utilized both for high voltage circuitry (Leff= 2.2 um) as well as peripheral circuits (Leff= 1.2 um). Furthermore, a thin oxide-nitride -oxide (ONO) interpoly dielectric for reliable floating gate performance is incorporated. Good dielectric breakdown, defect density, and charge retention characteristics are obtained. Write characteristics as well as softwrite endurance have been measured to be compatible with current high density EPROM designs.