DocumentCode
3556622
Title
Silicon-on-insulator (SOI) by bonding and ETCH-back
Author
Lasky, J.B. ; Stiffler, S.R. ; White, F.R. ; Abernathey, J.R.
Author_Institution
IBM Genereal Technology Division, Essex Junction, Vermont
Volume
31
fYear
1985
fDate
1985
Firstpage
684
Lastpage
687
Abstract
A silicon wafer bonding process is described in which only thermally grown oxide is present between wafer pairs. Bonding occurs after insertion into an oxidizing ambient. It is proposed the wafers are drawn into intimate contact as a result of the gaseous oxygen between them being consumed by oxidation, thus producing a partial vacuum. The proposed bonding mechanism is polymerization of silanol bonds between wafer pairs. A preferential etch-back process is used to produce Silicon-on-insulator (SOI) whose electrical quality is equal to that of bulk silicon. Capacitor measurements show a 27 µsec minority carrier lifetime and low Qss at the SOI-"bottom oxide" interface, in addition, there is negligible charge within the bonding oxide. N-channel and p-channel FET devices show threshold voltages and mobilities equal to bulk controls. The subthreshold leakage is less than 1 fA per micron of channel width.
Keywords
Capacitors; Charge measurement; Contacts; Current measurement; Etching; Oxidation; Polymers; Q measurement; Silicon on insulator technology; Wafer bonding;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1985 International
Type
conf
DOI
10.1109/IEDM.1985.191067
Filename
1485617
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