Lateral insulated gate transistors with improved latching characteristics

Lateral insulated gate transistors were fabricated to study their applicability for power integrated circuits. Three independent techniques for improving latching current are described in this paper. We obtained devices that latch at 510 A/cm², significantly greater than previously reported. We have also demonstrated devices that current-limit at 475 A/cm²without latching. Several device configurations are compared in terms of performance and processing trade-offs. In addition, computer simulations suggest a device design improvement that could result in a 30% increase in current density.