Title :
A CMOS device isolation structure using the selective-etch-and-refill-with-EPI (SEREPI) process
Author :
Kamins, T.I. ; Chiang, S.Y. ; Bradbury, D.R. ; Rao, D.B.
Author_Institution :
Hewlett-Packard Laboratories, Palo Alto, CA
Keywords :
CMOS process; Circuits; Doping profiles; Electric breakdown; Etching; Filling; Laboratories; Ring oscillators; Silicon; Testing;
Conference_Titel :
Electron Devices Meeting, 1985 International
DOI :
10.1109/IEDM.1985.191086
