Title :
Dielectrically encapsulated trench capacitor cell
Author :
Taguchi, M. ; Ando, S. ; Higaki, N. ; Goto, G. ; Ema, T. ; Hashimoto, K. ; Yabu, T. ; Nakano, T.
Author_Institution :
Fujitsu Laboratories, Atsugi, Japan
Abstract :
A DRAM cell with an improved trench structure, capacitor has been developed for 16M DRAMs. The capacitor is formed within a trench with polysilicon to polysilicon structure. Covering the storage electrode with the cell-plate makes this cell free from punch-through between adjacent cells. The whole capacitor is coverd with a dielectric layer and there is no interference between cells. An experimental cell was fabricated, using 4M DRAM technology. Measured data indicates that this cell is suitable for the forthcoming 16M DRAMs.
Keywords :
Capacitance; Capacitors; Dielectric measurements; Electrodes; Electronic equipment; Error analysis; Interference; Laboratories; Random access memory; Silicon;
Conference_Titel :
Electron Devices Meeting, 1986 International
DOI :
10.1109/IEDM.1986.191132
