DocumentCode
3556698
Title
Dielectrically encapsulated trench capacitor cell
Author
Taguchi, M. ; Ando, S. ; Higaki, N. ; Goto, G. ; Ema, T. ; Hashimoto, K. ; Yabu, T. ; Nakano, T.
Author_Institution
Fujitsu Laboratories, Atsugi, Japan
Volume
32
fYear
1986
fDate
1986
Firstpage
136
Lastpage
139
Abstract
A DRAM cell with an improved trench structure, capacitor has been developed for 16M DRAMs. The capacitor is formed within a trench with polysilicon to polysilicon structure. Covering the storage electrode with the cell-plate makes this cell free from punch-through between adjacent cells. The whole capacitor is coverd with a dielectric layer and there is no interference between cells. An experimental cell was fabricated, using 4M DRAM technology. Measured data indicates that this cell is suitable for the forthcoming 16M DRAMs.
Keywords
Capacitance; Capacitors; Dielectric measurements; Electrodes; Electronic equipment; Error analysis; Interference; Laboratories; Random access memory; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1986 International
Type
conf
DOI
10.1109/IEDM.1986.191132
Filename
1486390
Link To Document