DocumentCode :
3556768
Title :
Low temperature CMOS devices and technology
Author :
Plummer, J.D.
Author_Institution :
Stanford University, Stanford, CA
Volume :
32
fYear :
1986
fDate :
1986
Firstpage :
378
Lastpage :
381
Abstract :
The major advantages of operating CMOS circuits at reduced temperatures have been well known for many years. However, no large scale systems have yet employed this option commercially. This situation should change within the next year. Perhaps this is because the 2-3X performance improvement easily obtainable by cooling to 77°K (LN2), is becoming more and more difficult to achieve by traditional device scaling. There are other options for high performance technologies, however. These include truly optimized LN2CMOS, room temperature BICMOS and GaAs devices. This paper will attempt to assess our present capability in LN2CMOS and opportunities for future progress.
Keywords :
BiCMOS integrated circuits; CMOS integrated circuits; CMOS technology; Cooling; Gallium arsenide; Integrated circuit technology; MOS devices; Temperature; Thermal conductivity; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1986 International
Type :
conf
DOI :
10.1109/IEDM.1986.191197
Filename :
1486455
Link To Document :
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