DocumentCode :
3557161
Title :
"Insulated gate bipolar transistor (IGBT) with a trench gate structure "
Author :
Chang, H.R. ; Baliga, B.J. ; Kretchmer, J.W. ; Piacente, P.A.
Author_Institution :
General Electric Company, Schenectady, New York
Volume :
33
fYear :
1987
fDate :
1987
Firstpage :
674
Lastpage :
677
Abstract :
This paper describes an improved IGBT with a trench gate structure, which demonstrates a low forward voltage drop of 1.4 volts at a forward conduction current density of 200A/cm2. This device structure was fabricated using a self-aligned process that permits closely spaced vertical trench gates with a unit cell of 8 µm. This allows for a remarkable increase of channel density and elimination of the parasitic JFET effect thus reducing the forward voltage drop significantly. A static latching current density of 2700A/cm2has been achieved in the UMOS IGBT. Two-dimensional computer simulations of the UMOS IGBT has been performed to identify the optimal cell design. This optimal design is predicted to increase the SOA current density by a factor of 4.2 over the state-of-the-art DMOS IGBT at the same forward voltage drop.
Keywords :
Breakdown voltage; Computer simulation; Conductivity; Current density; Ice; Insulated gate bipolar transistors; Low voltage; Power semiconductor devices; Research and development; Semiconductor optical amplifiers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1987 International
Type :
conf
DOI :
10.1109/IEDM.1987.191518
Filename :
1487476
Link To Document :
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