DocumentCode
3557377
Title
Extended abstract: transition traversal coverage estimation for symbolic model checking
Author
Xu, Xingwen ; Kimura, Shinji ; Horikawa, Kazunari ; Tsuchiya, Takehiko
Author_Institution
Graduate Sch. of IPS, Waseda Univ., Tokyo, Japan
fYear
2005
fDate
11-14 July 2005
Firstpage
259
Lastpage
260
Abstract
Model checking can exhaustively verify whether a system (implementation) satisfies a set of properties (formal specification). However, the completeness of the formal specification itself is not clear and needs to be evaluated. Several coverage estimation methods have been proposed for this issue. In this paper, we present a transition traversal coverage method for a subset of CTL. With this method, we can detect the transitions, which are not verified by any property. It is more accurate and comprehensive than the state coverage method.
Keywords
finite state machines; formal verification; logic testing; finite state machines; formal specification; formal verification; symbolic model checking; transition traversal coverage estimation; Circuit faults; Counting circuits; Genetic mutations; Large scale integration; Sequential circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Formal Methods and Models for Co-Design, 2005. MEMOCODE '05. Proceedings. Third ACM and IEEE International Conference on
Print_ISBN
0-7803-9227-2
Type
conf
DOI
10.1109/MEMCOD.2005.1487932
Filename
1487932
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