DocumentCode :
3557396
Title :
Evaluation of self-heating effects on an innovative SOI technology ("Venezia" process)
Author :
Villani, P. ; Favilla, S. ; Labate, L. ; Novarini, E. ; Ponza, A. ; Stella, R.
Author_Institution :
STMicroelectronics, Cornaredo, Italy
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
63
Lastpage :
66
Abstract :
In this paper we investigate the thermal resistance associated to a power DMOS device realized by means of an innovative SOI process (Venezia process). First we present a simple experimental technique enabling to characterize device thermal transient by looking at its related drain current waveform, then we analyze and discuss the obtained experimental results pointing out the difference in thermal resistance between Venezia buried oxide and the one manufactured by standard technology.
Keywords :
power MOSFET; semiconductor technology; silicon-on-insulator; thermal analysis; thermal resistance; waveform analysis; SOI technology; Venezia buried oxide; Venezia process; device thermal transient; drain current waveform; power DMOS device; power MOSFET; self-heating effects; semiconductor technology; silicon-on-insulator; thermal resistance; Current measurement; Force measurement; Oscilloscopes; Performance evaluation; Probes; Pulse measurements; Temperature measurement; Thermal resistance; Thickness measurement; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices and ICs, 2005. Proceedings. ISPSD '05. The 17th International Symposium on
Print_ISBN :
0-7803-8890-9
Type :
conf
DOI :
10.1109/ISPSD.2005.1487951
Filename :
1487951
Link To Document :
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