DocumentCode :
3557409
Title :
Efficient TCAD methodology for ESD failure current prediction of smart power ESD protection
Author :
Salaméro, Christophe ; Nolhier, Nicolas ; Bafleur, Marise ; Besse, Patrice
Author_Institution :
LAAS-CNRS, Toulouse, France
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
115
Lastpage :
118
Abstract :
This work deals with a method to predict ESD protection robustness with TCAD simulations. Tested on different devices and two smart power technologies, the results are validated with electrical measurement and failure analysis. Failure current is always predicted with a good accuracy compared to technology spreading. In addition, the methodology provides a significant simulation time speedup compared to classical methods based on a temperature criterion.
Keywords :
VLSI; electrostatic discharge; failure analysis; power semiconductor devices; technology CAD (electronics); ESD failure current prediction; TCAD simulations; electrical measurement; failure analysis; simulation time speedup; smart power ESD protection; CMOS technology; Clamps; Electric breakdown; Electrostatic discharge; Predictive models; Protection; Qualifications; Robustness; Silicon; Temperature;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices and ICs, 2005. Proceedings. ISPSD '05. The 17th International Symposium on
Print_ISBN :
0-7803-8890-9
Type :
conf
DOI :
10.1109/ISPSD.2005.1487964
Filename :
1487964
Link To Document :
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