DocumentCode
3557422
Title
CMOS compatible super junction LDMOST with N-buffer layer
Author
Park, Il-Yong ; Salama, C. Andre T
Author_Institution
Edward S. Rogers Sr. Dept. of ECE, Toronto Univ., Ont., Canada
fYear
2005
fDate
23-26 May 2005
Firstpage
163
Lastpage
166
Abstract
A CMOS compatible super junction LDMOST (SJ-LDMOST) structure, which reduces substrate-assisted depletion effects, is reported. The proposed structure uses a N-buffer layer between the pillars and the P-substrate to achieve charge compensation between the pillars, the N-buffer layer and the P-substrate. The new structure features high breakdown voltage, low on resistance, excellent gate charge characteristics and reduced sensitivity to doping imbalance in the pillars.
Keywords
MOSFET; buffer layers; semiconductor doping; semiconductor junctions; CMOS compatible super junction LDMOST; N-buffer layer; P-substrate; SJ-LDMOST structure; breakdown voltage; charge compensation; doping imbalance; gate charge characteristics; substrate-assisted depletion effects; Buffer layers; CMOS technology; Degradation; Electric breakdown; Low voltage; MOSFETs; Semiconductor device doping; Solids; Strontium; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Semiconductor Devices and ICs, 2005. Proceedings. ISPSD '05. The 17th International Symposium on
Print_ISBN
0-7803-8890-9
Type
conf
DOI
10.1109/ISPSD.2005.1487976
Filename
1487976
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