DocumentCode
3557435
Title
1600V 4H-SiC UMOSFETs with dual buffer layers
Author
Zhang, Q. ; Gomez, M. ; Bui, C. ; Hanna, E.
Author_Institution
Cree, Inc., Durham, NC, USA
fYear
2005
fDate
23-26 May 2005
Firstpage
211
Lastpage
214
Abstract
This paper presents the design and fabrication of 1600V 4H-SiC UMOSFETs with a novel dual buffer layer structure, which shortens the trench etching time by 2× and achieves a high channel periphery density of 3330cm/cm2 for low specific on-resistance. The device exhibits 50mΩ-cm2 of specific on-resistance with ∼1μm of channel length, and could be further reduced with <1μm channel length and optimal fabrication process.
Keywords
buffer layers; power MOSFET; silicon compounds; 4H-SiC UMOSFET; SiC; channel length; channel periphery density; dual buffer layers; specific on-resistance; trench etching time; Breakdown voltage; Buffer layers; Doping; Etching; Fabrication; Implants; MOSFETs; Manufacturing processes; Nitrogen; Silicon carbide;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Semiconductor Devices and ICs, 2005. Proceedings. ISPSD '05. The 17th International Symposium on
Print_ISBN
0-7803-8890-9
Type
conf
DOI
10.1109/ISPSD.2005.1487988
Filename
1487988
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