DocumentCode
3558133
Title
Quasistatic and nonequilibrium phenomena in m.o.s. structures under the influence of a constant gate-current bias
Author
Allman, P.G.C. ; Simmons, J.G.
Author_Institution
University of Toronto, Department of Electrical Engineering, Toronto, Canada
Volume
127
Issue
3
fYear
1980
fDate
6/1/1980 12:00:00 AM
Firstpage
140
Lastpage
146
Abstract
The quasistatic and nonequilibrium response of an m.o.s. system containing bulk traps under constant gate-current conditions is analysed. It is shown that a particular advantage of the method is that the total semiconductor capacitance can be extracted directly from the curves, thus easing the analysis of quasistatic results for obtaining interface state density. For a specific range of operating conditions the resulting nonequilibrium characteristic is rich in structure, which allows for analysis of the bulk properties of the semiconductor.
Keywords
capacitance; electron traps; hole traps; interface electron states; metal-insulator-semiconductor structures; semiconductor device models; C/V characteristics; MOS structures; bulk traps; constant gate current bias; interface state density; nonequilibrium phenomena; quasistatic phenomena; semiconductor capacitance;
fLanguage
English
Journal_Title
Solid-State and Electron Devices, IEE Proceedings I
Publisher
iet
Conference_Location
6/1/1980 12:00:00 AM
ISSN
0143-7100
Type
jour
DOI
10.1049/ip-i-1.1980.0027
Filename
4642493
Link To Document