Scaled m.o.s. circuits: performances and simulation

Transient analysis simulations are used to investigate the m.o.s. device scaling theorem. Calculations are presented of the power-delay curves of loaded static NOR gates for two sets of devices: one, a control device with seven micron channel length, and the other scaled from the control by 0.6. It is shown that, when devices are scaled correctly, circuit performance scales according to the prediction of the scaling theorem. Furthermore, considerations are presented on circuit performance degradation if power-supply voltages are not scaled similarly to device dimensions.