DocumentCode :
3558182
Title :
High-yield process for GaAs enhancement-mode MESFET integrated circuits
Author :
Mun, J. ; Phillips, J.A. ; Barry, B.E.
Author_Institution :
Standard Telecommunication Laboratories Limited, Harlow, UK
Volume :
128
Issue :
4
fYear :
1981
fDate :
8/1/1981 12:00:00 AM
Firstpage :
144
Lastpage :
147
Abstract :
The paper describes a high-yield process for the fabrication of enhancement-mode MESFET integrated circuits. The process utilises light-stimulated anodic oxidation followed with oxide removal as a means of recessing the gate of an FET for normally-off operation. The oxidation technique has an important self-limiting property allowing different amounts of GaAs to be oxidised according to local doping and thickness variations. Yields of over 85% of 11-stage ring oscillators have been obtained by this method with a standard deviation in the pinch-off voltage of 75 mV, which represents a factor of four improvement over as-grown vapour-phase epitaxial material. The recessed-gate normally-off MESFET structure also has the highest transconductance reported to date due to the reduction in parasitic series resistance. Values of gm up to 70 mS/mm have been obtained from MESFETs having gate lengths of 1.5 ¿m.
Keywords :
III-V semiconductors; Schottky gate field effect transistors; field effect integrated circuits; gallium arsenide; integrated logic circuits; oxidation; GaAs enhancement-mode MESFET integrated circuits; III-V semiconductors; fabrication; high-yield process; light-stimulated anodic oxidation; pinch-off voltage; ring oscillators; transconductance; vapour-phase epitaxial material;
fLanguage :
English
Journal_Title :
Solid-State and Electron Devices, IEE Proceedings I
Publisher :
iet
Conference_Location :
8/1/1981 12:00:00 AM
ISSN :
0143-7100
Type :
jour
DOI :
10.1049/ip-i-1.1981.0037
Filename :
4642575
Link To Document :
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