Modelling of small MOS devices and device limits

The paper reviews the various approaches to the modelling of small-geometry MOS devices. The physics and interaction of device properties in small MOSFETs are discussed as they apply to device and circuit design for VLSI. It is shown that statistical fluctuation of device geometry and the effect of parasitics is the primary determinant of circuit performance. Scaling theory for MOSFETs and limits to scaling are examined in the context of geometry and high-field effects. It is concluded that the incentives to scale geometries below 0.5 ¿m are small.