A Novel High-Performance Poly-Silicon Thin-Film Transistor With a Double-Channel Structure

Author

Chien, Feng-Tso ; Fang, Chin-Mu ; Liao, Chien-Nan ; Chen, Chii-Wen ; Cheng, Ching-Hwa ; Tsai, Yao-Tsung

Author_Institution

Dept. of Electron. Eng., Feng Chia Univ., Taichung

Volume

29

Issue

11

fYear

2008

Firstpage

1229

Lastpage

1231

Abstract

In this letter, a novel double-channel polycrystalline-silicon (poly-Si) thin-film transistor (DCTFT) is proposed and demonstrated. The DCTFT, which includes two channels with a thicker source/drain (S/D) region, a field-induced drain, and an offset structure, reveals better device performance and lower S/D resistance. Our experimental results show that the on-current of the DCTFT is higher than that of the conventional structure, and the leakage current is greatly reduced simultaneously. In addition, the device stability such as the threshold-voltage shift under a high gate bias is also improved by this two-channel and thick-S/D-region structure design. The lower drain electric field of the DCTFT is also a benefit to the device scaling down for better performances.

Keywords

elemental semiconductors; leakage currents; silicon; thin film transistors; Si; device stability; double-channel structure; gate bias; leakage current; polysilicon thin-film transistor; source-drain region; threshold-voltage shift; Glass manufacturing; High K dielectric materials; High-K gate dielectrics; Integrated circuit manufacture; Leakage current; Plastic films; Scanning electron microscopy; Stability; Thin film circuits; Thin film transistors; Double channel; poly-Si thin-film transistor (TFT); raised source/drain (S/D);

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2008.2005431

Filename

4655502