Strain Enhanced nMOS Using In Situ Doped Embedded $\hbox {Si}_{1 - x}\hbox {C}_{x}$ S/D Stressors With up to 1.5% Substitutional C

This letter reports on the implementation of high carbon content and high phosphorous content Si_1-xC_x layers in the source and drain regions of n-type MOSFET in a 65-nm-node integration scheme. The layers were grown using a novel epitaxial process. It is shown that by implementing stressors with x ap 0.01, nMOSFET device performance is enhanced by up to 10%, driving 880 muA/mum at 1-V V _DD. It is also demonstrated that the successful implementation of Si_1-xC_x relies on the careful choice of integration and epitaxial layer parameters. There is a clear impact of the postepitaxial implantation and thermal treatment on the retained substitutional C content ([C _sub]). Furthermore, adding a Si capping layer on top of the Si_{1 -x}C_x, greatly improves upon the stressors´ stability during the downstream processing and the silicide sheet resistance.