DocumentCode
3559455
Title
Wideband Signal Synthesis Using Interleaved Partial-Order Hold Current-Mode Digital-to-Analog Converters
Author
Jha, Anuranjan ; Kinget, Peter R.
Author_Institution
Silicon Labs., Austin, TX
Volume
55
Issue
11
fYear
2008
Firstpage
1109
Lastpage
1113
Abstract
We describe how a zero-order hold digital-to-analog converter (DAC) followed by a windowed-integration-based filter results in a novel partial-order hold (POH) DAC architecture with the ability of broadband image reduction between 1.5 and two times the sampling frequency while also providing a flat-group delay. Interleaving two such POH-DACs results in a DAC with an excellent output signal reconstruction whereby the broadband sampling images below two times the sampling frequency in the output signal spectrum are strongly reduced. Some implementation techniques are proposed and the effect of implementation nonidealities is evaluated.
Keywords
digital-analogue conversion; filtering theory; signal reconstruction; signal sampling; signal synthesis; broadband image reduction; broadband sampling image; digital-to-analog converter; flat-group delay; interleaved partial-order hold current-mode; output signal spectrum; sampling frequency; signal reconstruction; wideband signal synthesis; windowed-integration-based filter; Digital filters; Digital-analog conversion; Frequency synthesizers; Image reconstruction; Image sampling; Interleaved codes; Signal generators; Signal resolution; Signal synthesis; Wideband; Digital-to-analog converter (DAC); sinc filter; time interleaving; wideband signal synthesis; windowed integration;
fLanguage
English
Journal_Title
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher
ieee
ISSN
1549-7747
Type
jour
DOI
10.1109/TCSII.2008.2004538
Filename
4703547
Link To Document