DocumentCode :
3559469
Title :
Formally Verified Argument Reduction with a Fused Multiply-Add
Author :
Boldo, Sylvie ; Daumas, Marc ; Li, Ren-Cang
Author_Institution :
INRIA Saclay - Ile-de-France, Pare Orsay Univ., Orsay, France
Volume :
58
Issue :
8
fYear :
2009
Firstpage :
1139
Lastpage :
1145
Abstract :
The Cody and Waite argument reduction technique works perfectly for reasonably large arguments, but as the input grows, there are no bits left to approximate the constant with enough accuracy. Under mild assumptions, we show that the result computed with a fused multiply-add provides a fully accurate result for many possible values of the input with a constant almost accurate to the full working precision. We also present an algorithm for a fully accurate second reduction step to reach full double accuracy (all the significand bits of two numbers are accurate) even in the worst cases of argument reduction. Our work recalls the common algorithms and presents proofs of correctness. All the proofs are formally verified using the Coq automatic proof checker.
Keywords :
floating point arithmetic; formal verification; Cody argument reduction technique; Coq automatic proof checker; Waite argument reduction technique; floating-point subtraction; formally verified argument reduction; fused multiply-add; Equations; Error analysis; Mathematics; Roundoff errors; Software libraries; Argument reduction; Computer arithmetic; Coq.; Formal methods; Mathematical Software; Software Engineering; Software/Program Verification; Software/Software Engineering; fma; formal proof;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
Conference_Location :
12/12/2008 12:00:00 AM
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.2008.216
Filename :
4711042
Link To Document :
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