DocumentCode
3559577
Title
A low complexity block turbo decoder architecture - [transactions letters]
Author
Vanstraceele, C. ; Geller, B. ; Brossier, J.M. ; Barbot, J.-P.
Author_Institution
Lab. SATIE, ENS Cachan, Cachan
Volume
56
Issue
12
fYear
2008
fDate
12/1/2008 12:00:00 AM
Firstpage
1985
Lastpage
1987
Abstract
In this letter we present a low-complexity architecture designed for the decoding of block turbo codes. In particular we simplify the implementation of Pyndiah´s algorithm by not storing any of the concurrent codewords generated by the list decoder.
Keywords
block codes; decoding; turbo codes; Pyndiah´s algorithm; concurrent codewords; low-complexity block turbo decoder architecture; Block codes; Convolutional codes; Digital communication; Equations; Iterative algorithms; Iterative decoding; Laboratories; Maximum likelihood decoding; Power system reliability; Turbo codes; Block codes; iterative decoding; low-complexity design; turbo codes;
fLanguage
English
Journal_Title
Communications, IEEE Transactions on
Publisher
ieee
Conference_Location
12/1/2008 12:00:00 AM
ISSN
0090-6778
Type
jour
DOI
10.1109/TCOMM.2008.050636
Filename
4711158
Link To Document