Title : 
Two-Dimensional Monte Carlo Simulation of DGSOI MOSFET Misalignment
         
        
            Author : 
Valin, Raul ; Sampedro, Carlos ; Aldegunde, Manuel ; Garcia-Loureiro, Antonio ; Seoane, Natalia ; Godoy, Andres ; Gamiz, Francisco
         
        
            Author_Institution : 
Dept. de Electron. y Comput., Univ. de Santiago de Compostela, Santiago de Compostela, Spain
         
        
        
        
        
            fDate : 
6/1/2012 12:00:00 AM
         
        
        
        
            Abstract : 
In this paper, we investigate the gate misalignment effects in a 10-nm double-gate silicon-on-insulator MOSFET transistor with a 2-D Monte Carlo simulator. Quantum effects, which are of special relevance in such devices, are taken into account by using the multivalley effective conduction-band-edge method. Different gate misalignment configurations have been considered to study the impact on device performance, finding a current improvement when the gate misalignment increases the source-gate overlapping. Moreover, our results show that a 20% gate misalignment can be assumed for a drain current deviation smaller than 10%. Finally, the validity of the obtained results was assessed with a set of simulations for devices that have different gate lengths, silicon thicknesses, and oxide thicknesses.
         
        
            Keywords : 
MOSFET; Monte Carlo methods; silicon-on-insulator; 2D Monte Carlo simulator; DGSOI MOSFET misalignment; current improvement; device performance; double-gate silicon-on-insulator; drain current deviation; gate lengths; gate misalignment effects; multivalley effective conduction-band-edge method; oxide thicknesses; quantum effects; silicon thicknesses; size 10 nm; source-gate overlapping; two-dimensional Monte Carlo simulation; Electrostatics; Logic gates; MOSFET circuits; Monte Carlo methods; Performance evaluation; Scattering; Silicon; Double gate (DG); Monte Carlo methods; gate misalignment; multivalley effective conduction-band-edge method (MV-ECBE); silicon-on-insulator (SOI);
         
        
        
            Journal_Title : 
Electron Devices, IEEE Transactions on
         
        
        
            Conference_Location : 
5/2/2012 12:00:00 AM
         
        
        
        
            DOI : 
10.1109/TED.2012.2192738