Title :
Electrical-Stress-Induced Threshold Voltage Instability in Solution-Processed ZnO Thin-Film Transistors: An Experimental and Simulation Study
Author :
Gupta, Dipti ; Yoo, Seunghyup ; Lee, Changhee ; Hong, Yongtaek
Author_Institution :
Dept. of Electr. Eng., Seoul Nat. Univ., Seoul, South Korea
fDate :
7/1/2011 12:00:00 AM
Abstract :
In this paper, we present the experimental and simulation results of the stress-recovery characteristics of solution-processed ZnO thin-film transistors under gate bias and current stress conditions. Under both stress conditions, we invariably observed a positive threshold voltage shift (ΔVT) that is initially associated with changes in the values of subthreshold slope and off-current, which later becomes constant on prolonging the stress time. However, ΔVT was less for current stress, compared with gate bias stress. This stress-induced ΔVT is speculated to be caused by defect creation in the active layer and charge trapping at the semiconductor-dielectric interface. Following a stretched exponential model, at room temperature, a characteristics time of 1.6 × 103-3.6 × 103s during stress and 7.7 × 103-15.7 × 103s during recovery was obtained under all gate bias and current stress conditions. The ΔVT-time measurements performed under various temperatures yield an activation energy of ~ 0.5 and ~ 0.7 eV for the stress and recovery periods, respectively. The device simulation indicates that ΔVT is mainly caused by the increase in accept or like defects of the density of states in the ZnO channel layer. Furthermore, it was found that the deep lying states are responsible for the change in the value of inverse subthreshold slope.
Keywords :
thin film transistors; zinc compounds; ZnO; active layer; charge trapping; current stress conditions; electrical-stress-induced threshold voltage instability; electron volt energy 0.5 eV; electron volt energy 0.7 eV; gate bias stress; inverse subthreshold slope; positive threshold voltage shift; semiconductor-dielectric interface; solution-processed thin-film transistors; stress-recovery characteristics; Charge carrier processes; Current measurement; Logic gates; Semiconductor device measurement; Stress; Threshold voltage; Zinc oxide; 2-D simulation; Bias and current stress; electrical stability; solution-processed zinc oxide (ZnO); thin-film transistor (TFT);
Journal_Title :
Electron Devices, IEEE Transactions on
Conference_Location :
5/5/2011 12:00:00 AM
DOI :
10.1109/TED.2011.2138143