DocumentCode
3561013
Title
CLIP: Circuit Level IC Protection Through Direct Injection of Process Variations
Author
Griffin, W. Paul ; Raghunathan, Anand ; Roy, Kaushik
Author_Institution
Dept. of Electr. Eng., Purdue Univ., West Lafayette, IN, USA
Volume
20
Issue
5
fYear
2012
fDate
5/1/2012 12:00:00 AM
Firstpage
791
Lastpage
803
Abstract
The disaggregation of the semiconductor design and manufacturing process has resulted in integrated circuit (IC) piracy becoming an important concern to the semiconductor industry. To address this concern, we present a method for achieving robust IC protection at the circuit level through direct injection of process variations. In the proposed approach, the circuit is enhanced by including process variation (PV) sensors and modifying the design during synthesis to inject the outputs of the PV sensors into the logic at carefully selected nodes. As a result, each fabricated IC is rendered inoperative unless a unique per-chip unlocking key is applied. After fabrication, the response of each chip to specially generated test vectors is used to construct the correct per-chip unlocking key. We propose a methodology to automatically modify circuits by identifying pairs of injection and correction points, while avoiding delay penalty and minimizing area overheads. We propose the use of a cryptographic preprocessor to separate the internal key used from the external unlocking key, further enhancing the resistance of the proposed approach against several attacks. Our methodology is scalable to the key size and requires only a small area overhead to achieve reasonable security levels (e.g., 7% for 64-bit keys in a 8 k gate design). We analyze the security of the proposed technique under several attack scenarios and believe that it offers robust protection against a wide range of attacks.
Keywords
cryptography; industrial property; integrated circuit design; program processors; reverse engineering; CLIP; area overheads; circuit level IC protection; correction points; cryptographic preprocessor; delay penalty; direct injection; injection points; integrated circuit piracy; manufacturing process; per-chip unlocking key; process variation sensors; process variations; reverse engineering; semiconductor design; semiconductor industry; test vectors; IP networks; Integrated circuits; Logic gates; Reverse engineering; Security; Sensors; Switches; Hardware security; integrated circuit (IC) piracy; process variations; reverse engineering;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
Conference_Location
5/5/2011 12:00:00 AM
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2011.2135868
Filename
5762649
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