A proposed FPGA architecture for real-time object tracking using commodity sensors

In this paper, we propose an FPGA implementation of an object tracker inspired by the CAMSHIFT Algorithm that can be applied to VGA resolution images. We focus on architectural issues in designing such a system when constrained by the capabilities of commodity hardware and discuss a variety of area and speed tradeoffs relevant to low cost systems, with a particular focus on throughput and parallelism. We argue that while a system oriented towards vector processing offers a significant reduction in processing time, limitations in the acquisition rate of the sensor prevent us from realizing absolute time-savings. Thus, we consider the optimization in a different light - that processing time reductions afford room for additional processing and necessitate a focus on small area designs. The system targets the Altera Cyclone IV EP4CE115F29C7 FPGA found on the DE2-115 development board, with a Terasic D5M Digital Camera, and is pipelined to achieve a nominal maximum pixel clock rate of 100MHz.