DocumentCode :
3562524
Title :
An 8GS/s 6-bit current steering DAC in 65nm CMOS technology
Author :
Wu Xiong ; Li Wenyuan ; Sun Chuyang
Author_Institution :
Inst. of RF-&OE-ICs, Southeast Univ., Nanjing, China
fYear :
2014
Firstpage :
491
Lastpage :
493
Abstract :
A 6-bit low power current steering data to analog converter (DAC) which sampling frequency up to 8GHz is presented. The converter consists of 4MSBs and 2LSBs, trading off between the precision and complexity of circuit. The 8-GSample/s conversion rate has been obtained by fully custom designed thermometer decoder and synchronization circuit. The spurious free dynamic rang (SFDR) more than 34.2 dB has been obtained from dc to 2.7GHz at sampling frequency of 8GHz. The power consumption at an 8GHz sampling frequency for a near Nyquist sinusoidal output signal equals 15.7mW. The DAC occupies 0.485 mm × 0.675 mm in a 65nm CMOS technology.
Keywords :
CMOS digital integrated circuits; codecs; digital-analogue conversion; logic design; low-power electronics; power consumption; synchronisation; thermometers; CMOS technology; Nyquist sinusoidal output signal; SFDR; current steering DAC; frequency 8 GHz; low power current steering data to analog converter; power 15.7 mW; power consumption; sampling frequency; size 0.485 mm; size 0.675 mm; size 65 nm; spurious free dynamic rang; synchronization circuit; thermometer decoder; Architecture; CMOS integrated circuits; CMOS technology; Decoding; Solid state circuits; Switches; Switching circuits; CMOS; current-steering; digital to analog converter(DAC); low power;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advanced Technologies for Communications (ATC), 2014 International Conference on
Print_ISBN :
978-1-4799-6955-5
Type :
conf
DOI :
10.1109/ATC.2014.7043438
Filename :
7043438
Link To Document :
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