• DocumentCode
    3562568
  • Title

    A design procedure for three-stage operational amplifier using indirect compensation technique

  • Author

    Nguyen, Son T. ; Bui, Tu T.

  • Author_Institution
    HCMC Univ. of Inf. Technol., Ho Chi Minh City, Vietnam
  • fYear
    2014
  • Firstpage
    725
  • Lastpage
    728
  • Abstract
    This paper presents a design procedure for the operational amplifier (Opamp) using indirect compensation technique. It provides a step-by-step guideline for designing an operational amplifier. Then a three-stage Opamp has been designed as an example. This Opamp achieves an open loop gain above 90dB, 70MHz gain-bandwidth product (GBW) and 68° phase margin (PM) at large capacitive load CL of 30pF in a 0.18μm CMOS technology. The supply voltage Opamp is 1.8V with the power dissipation of 826.45μW.
  • Keywords
    CMOS analogue integrated circuits; UHF amplifiers; integrated circuit design; operational amplifiers; CMOS technology; GBW; capacitance 30 pF; capacitive load; frequency 70 MHz; gain-bandwidth product; indirect compensation technique; opamp; open loop gain; operational amplifier; phase margin; power 826.45 muW; power dissipation; size 0.18 mum; voltage 1.8 V; CMOS process; ISO standards; RNA; Silicon; Topology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Technologies for Communications (ATC), 2014 International Conference on
  • Print_ISBN
    978-1-4799-6955-5
  • Type

    conf

  • DOI
    10.1109/ATC.2014.7043482
  • Filename
    7043482
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3562568