Title :
Fast residue-to-binary converter architectures
Author :
Mathew, Jimson ; Radhakrishnan, D. ; Srikanthan, T.
Author_Institution :
Sch. of Appl. Sci., Nanyang Technol. Univ., Singapore
Abstract :
Hardware efficient residue-to-binary converter architectures for three different moduli sets are presented in this paper. Two of them use three moduli each and the third one uses five moduli. One of the triple moduli sets has an extended dynamic range compared to the standard triple moduli set. In addition, the five moduli set covers a very large dynamic range
Keywords :
residue number systems; digital arithmetic; dynamic range; hardware architecture; moduli set; residue number system; residue-to-binary converter; Cathode ray tubes; Computer architecture; Concurrent computing; Digital arithmetic; Digital signal processing; Dynamic range; Error correction; Hardware; Signal design; Variable speed drives;
Conference_Titel :
Circuits and Systems, 1999. 42nd Midwest Symposium on
Conference_Location :
Las Cruces, NM
Print_ISBN :
0-7803-5491-5
DOI :
10.1109/MWSCAS.1999.867826
