Title :
A novel energy efficient voltage level shifter
Author :
Machiraju, Pavan Kumar ; Pushpamithra, D.Y.
Author_Institution :
Dept. of ECE, SITAMS, Chittoor, India
Abstract :
Level up and level down applications can be performed by using the novel Efficient Voltage Level Shifter (EVLS). Based on its input voltage the proposed EVLS can able to perform level up shift or level down shift. EVLS means, the circuit monitors its input voltage and performs level up shift, when its input voltage is low and level down shift when its input voltage is high. This novel level shifter consistently performs level up shift from 0.6V to 1.2V and level down shift from 1.2V to 0.6V. A new design of level up and down shifter for low power application has been presented. The circuit has been designed and simulated with 90nm process technology. In analysis of power and delay, the new proposed EVLS shifter has level up and level down average power dissipation of 24.7145nW and with a delay of 2.053ns has achieved.
Keywords :
VLSI; integrated circuit design; low-power electronics; energy efficient voltage level shifter; input voltage; level down shift; level up shift; low power application; power 24.7145 nW; size 90 nm; time 2.053 ns; voltage 0.6 V to 1.2 V; CMOS integrated circuits; Delays; Energy efficiency; Performance analysis; Power demand; Transistors; Very large scale integration; Down shift; Efficient Voltage Level shifter; Up shift; Voltage islands;
Conference_Titel :
Science Engineering and Management Research (ICSEMR), 2014 International Conference on
Print_ISBN :
978-1-4799-7614-0
DOI :
10.1109/ICSEMR.2014.7043658
