DocumentCode :
3563965
Title :
Highly stable subthreshold single-ended 7T SRAM cell
Author :
Anand, Nitin ; Roy, Chandaramauleshwar ; Islam, Aminul
Author_Institution :
Dept. of Electron. & Commun. Eng., Birla Inst. of Technol., Ranchi, India
fYear :
2014
Firstpage :
1
Lastpage :
4
Abstract :
This article presents a highly stable single-ended 7T (SE-7T) SRAM cell in subthreshold region. Using Monte-Carlo simulations critical design metrics of proposed SE-7T SRAM cells are estimated. Estimated results are compared with that of conventional 6T SRAM cell. The SE-7T SRAM cell offers 2.71× and 2.71× and 8.42 X improvements in Read Access Time (TRA) and Write Access Time (TWA) for write-1 and write-0 respectively. The proposed bit cell also offers 3.28× improvement in read static noise margin (RSNM) and 1.22× higher hold power@ 350 mV.
Keywords :
Monte Carlo methods; SRAM chips; integrated circuit design; integrated circuit noise; 6T SRAM cell; Monte-Carlo simulation; RSNM; SE-7T SRAM cell; highly stable subthreshold single-ended 7T SRAM cell; read access time; read static noise margin; voltage 350 mV; write access time; Circuit stability; Computer architecture; Microprocessors; Noise; SRAM cells; Transistors; CMOS; Hold Power; Read Delay; Read SNM; Write Delay;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Emerging Technology Trends in Electronics, Communication and Networking (ET2ECN), 2014 2nd International Conference on
Print_ISBN :
978-1-4799-6985-2
Type :
conf
DOI :
10.1109/ET2ECN.2014.7044928
Filename :
7044928
Link To Document :
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