Title :
Ultra-thin Si directly on insulator (SDOI) MOSFETs at 20 nm gate length
Author :
Mohapatra, S.K. ; Pradhan, K.P. ; Sahu, P.K. ; Singh, D. ; Panda, S.
Author_Institution :
Dept. of Electr. Eng., Nat. Inst. of Technol. (NIT), Rourkela, India
Abstract :
This paper investigates on the scaling capability of nanoscale ultra-thin (UT) silicon directly on insulator (SDOI) single gate (SG) and double-gate (DG) Metal Oxide Semiconductor Field-Effect Transistors (MOSFETs). An experiment is done by numerical modelling for both NMOS and PMOS by using device simulator TCAD Sentaurus. Based on the model, we conduct an investigation on Short Channel Effects (SCEs) like drain induced barrier lowering (DIBL), threshold voltage (Vth) shifting between two devices. Two types (Single and Double gate) enhancement type MOSFET has been studied for nanoscale CMOS digital application.
Keywords :
MOSFET; elemental semiconductors; nanoelectronics; semiconductor device models; silicon-on-insulator; DG metal oxide semiconductor field-effect transistors MOSFET; DIBL; NMOS; PMOS; SCE; SDOI; SG metal oxide semiconductor field-effect transistors; Si; TCAD Sentaurus; UT silicon directly on insulator; device simulator; double-gate metal oxide semiconductor field-effect transistors; drain induced barrier lowering; gate length; nanoscale CMOS digital application; nanoscale ultrathin silicon directly on insulator; numerical modelling; short channel effects; single gate metal oxide semiconductor field-effect transistors; size 20 nm; threshold voltage; Nanoscale devices; Nanostructures; Performance evaluation; Periodic structures; Semiconductor device modeling; Substrates; Technological innovation; DIBL; Ion/Ioff ratio; Short Channel Effects (SCEs); Threshold Voltage (Vth); Ultra-Thin Body (UTB) MOSFET;
Conference_Titel :
High Performance Computing and Applications (ICHPCA), 2014 International Conference on
Print_ISBN :
978-1-4799-5957-0
DOI :
10.1109/ICHPCA.2014.7045357