DocumentCode
3564497
Title
Tolerance to defective memristors in a neuromorphic learning circuit
Author
Yakopcic, Chris ; Hasan, Raqibul ; Taha, Tarek M.
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Dayton, Dayton, OH, USA
fYear
2014
Firstpage
243
Lastpage
249
Abstract
This paper describes a memristor based neuromorphic circuit that is capable of learning. Target memristors within the crossbar circuit were set to be stuck in either high or low resistance states to observe fault tolerance within the memristor crossbar. The simulations are carried out in SPICE using a detailed memristor model so that the crossbar is simulated as accurately as possible. In some cases the circuit was able to successfully learn when half of the memristors in the crossbar were set to be defective. Due to additional bias circuitry, this neuromorphic memristive learning circuit appears to be more tolerant to error than alternative designs.
Keywords
SPICE; memristor circuits; memristors; neural nets; SPICE; defective memristor; fault tolerance; memristor based neuromorphic circuit; memristor crossbar; neuromorphic memristive learning circuit; Integrated circuit modeling; Memristors; Neuromorphics; Neurons; Resistance; SPICE; Training; Memristor; SPICE; device; neuromorphic;
fLanguage
English
Publisher
ieee
Conference_Titel
Aerospace and Electronics Conference, NAECON 2014 - IEEE National
Print_ISBN
978-1-4799-4690-7
Type
conf
DOI
10.1109/NAECON.2014.7045810
Filename
7045810
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