DocumentCode :
3565036
Title :
Drain extended MOS device design for integrated RF PA in 28nm CMOS with optimized FoM and ESD robustness
Author :
Gupta, Ankur ; Shrivastava, Mayank ; Baghini, Maryam Shojaei ; Sharma, Dinesh Kumar ; Chandorkar, A.N. ; Gossner, Harald ; Ramgopal Rao, V.
Author_Institution :
EE Dept., Indian Inst. of Technol. Bombay, Mumbai, India
fYear :
2014
Abstract :
This paper explores drain extended MOS (DeMOS) device design guidelines for an area scaled, ESD robust integrated radio frequency power amplifier (RF PA) for advanced system-on-chip applications in 28nm node CMOS. Simultaneous improvement of device-circuit performance and ESD robustness is discussed for the first time. By device design optimization a 45% increase in gain and 25% in power-added efficiency of RF PA at 1GHz, and 5× improvements in ESD robustness are reported experimentally.
Keywords :
CMOS analogue integrated circuits; UHF integrated circuits; UHF power amplifiers; electrostatic discharge; integrated circuit design; optimisation; system-on-chip; CMOS technology; DeMOS device; ESD robustness; FoM optimization; device-circuit performance; drain extended MOS device design; efficiency 25 percent; frequency 1 GHz; integrated RF PA; integrated radiofrequency power amplifier; size 28 nm; system-on-chip application; CMOS integrated circuits; Electric fields; Electrostatic discharges; Logic gates; Performance evaluation; Radio frequency; Robustness;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting (IEDM), 2014 IEEE International
Type :
conf
DOI :
10.1109/IEDM.2014.7046974
Filename :
7046974
Link To Document :
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